EDN

VHDL 101 – Introduction

Field-Programmable Gate Arrays (FPGAs) look like very complex integrated circuits. Performing bespoke functions and having engineers programming them in strange languages puts many people off. This is ...
Design-Reuse

Powerful FPGA Design Creation and Simulation IDE Adds VHDL-2019 Support & OSVVM Enhancements

Aldec’s Active-HDL™ enables FPGA designers to take full advantage of the many features within the latest revision to VHDL and helps improve design verification efficiency. Henderson, NV – January 20, ...
insideHPC

FPGA Programming Made Easy

Field-programmable gate arrays (FPGAs) are becoming an increasingly popular tool for applications where high performance, low latency and power efficiency are requires. Since an FPGA can be ...
EDN

10 Ways to program your FPGA

Despite the recent push toward high level synthesis (HLS), hardware description languages (HDLs) remain king in field programmable gate array (FPGA) development. Specifically, two FPGA design ...
Electronic Design

Facing Up To Today’s FPGA Verification Challenges

Today it is not unusual for FPGA users to have to deal with more than one language in their designs. At earlier stages of the design development it may be necessary to interface HDL simulation with ...
Yahoo Finance

Menta Follows FPGA Leaders by Selecting Verific for its SystemVerilog, VHDL Front End

ALAMEDA, CA--(Marketwired - Jul 2, 2014) - Verific Design Automation today announced Menta® selected its industry-standard, IEEE-compliant SystemVerilog and VHDL parsers to serve as the front end to ...
Design-Reuse

PROGRAMMABLE LOGIC: Compiler turns FPGAs into supercomputers

Santa Cruz, Calif. — Scientists, engineers and software developers who know nothing about chip design can now compile high-performance computing applications into FPGAs, according to startup ...
Electronic Design

11 Myths About High-Level-Synthesis Techniques for Programming FPGAs

High-level synthesis to the rescue? You might be surprised at how hardware designers are getting new value from HLS when designing systems with FPGAs. The numbers of applications using FPGAs are on ...
Hackaday

MyHDL Python Programming Option For FPGA

MyHDL is a Python module that brings FPGA programming into the Python environment. [Christopher Felton] tipped us off about a simple tutorial he just finished that gives an overview of how the module ...